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phoronix.com /1 week ago

AVX-512 xor_gen For Linux Updated & Looking Real Good For RAID Arrays

Being worked on the past few months for the Linux kernel has been an AVX-512 optimized version of xor_gen() that is used for generating and validating parity blocks such as with Li...

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phoronix.com /1 month ago

AMD Posts AVX10_V2_AUX ISA Support Patches For GCC Compiler

Earlier this month Intel compiler engineers posted initial GCC compiler patches for the AI Compute Extensions "ACE" that was born out of the x86 Ecosystem Advisory Group to augment...

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phoronix.com /3 weeks ago

AVX-512 xor_gen Continues To Look Exciting For Helping Linux RAID With Modern CPUs

Google engineer Eric Biggers back in June posted an AVX-512 optimization for Linux RAID yielding up to a 41% improvement on a modern AMD Ryzen 9 9950X (Zen 5) processor. A revised...

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phoronix.com /3 weeks ago

KTransformers 0.7 Expands AVX-512 Support To Benefit AMD EPYC Servers

KTransformers as the framework for heterogeneous LLM inference and fine-tune optimizations is out today with its v0.7 feature release...

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phoronix.com /1 month ago

FFmpeg Lands Latest AVX-512 Optimization: 1.372x Faster In Pixel Format Conversion

The latest hand-tuned code in the FFmpeg multimedia library for allowing better performance on today's modern Intel/AMD AVX-512-capable processors is showing 1.372x faster performa...

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phoronix.com /1 week ago

GCC 17 Compiler Merges Initial Support For Intel/AMD AI Compute Extensions "ACE"

Landing today in the GNU Compiler Collection (GCC) codebase is initial support for the AI Compute Extensions (ACEv1) as the initial work out of the x86 Ecosystem Advisory Group bet...

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phoronix.com /1 month ago

LLVM 23.1-rc1 Released With AMD Zen 6 & AVX-512 BMM Support, Other Compiler Enhancements

Following the recent code branching for the LLVM 23 series, LLVM 23.1-rc1 was released today in working toward the next stable release of this open-source compiler stack...

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phoronix.com /4 weeks ago

GCC 17 Compiler Adding "-m128bit-atomic" For 128-bit Atomic Memory Operations

Merged today to the GNU Compiler Collection Git code is the new -m128bit-atomic option for next year's GCC 17 feature release...

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phoronix.com /1 month ago

Mysterious 16-Tile & 32-Tile AMX Implementations Talked Up For More Performance

Last October on Phoronix we were first to point out there being some mysterious intrigue around a new x86 implementation from a "corporate entity other than Intel/AMD" with the dev...

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phoronix.com /1 month ago

UXL's oneDNN 3.13 Preps For Intel Nova Lake With AVX10.2, More Intel Optimizations

Following the release of AMD's ZenDNN 6.0 earlier this month, there is a new feature release of the oneDNN neural network library that used to be developed by Intel as part of oneA...

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habr.com /1 month ago

В Go 1.27 завезли SIMD

Дядя Хашимото сказал разобраться, я попытался. Речь про его эссе «Everyone Should Know SIMD»: SIMD должен знать каждый разработчик; примеры там на Zig, но суть от языка не зависит....

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3dnews.ru /1 month ago

AMD бросила новый вызов Nvidia: представлен ускоритель Instinct MI455X с 432 Гбайт HBM4 и до четырёх раз быстрее предшес...

Компания AMD представила специализированные ИИ-ускорители Instinct MI455X для центров обработки данных. Они основаны на архитектуре CDNA 5 и предназначены для масштабного обучения...

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cnx-software.com /2 weeks ago

StarFive Dubhe-100 – A 64-bit, RVA23-compliant RISC-V core for high-performance applications

StarFive has launched a new high-performance 64-bit RISC-V core from the Dubhe family with the RVA23-compliant Dubhe-100 designed for servers and HPC, as well as other high-perform...

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thenextweb.com /1 month ago

AMD’s Helios puts 72 GPUs and 31 terabytes of HBM4 in one rack. It is AMD’s answer to Nvidia’s NVL72.

AMD’s Helios is a single rack containing 72 Instinct MI455X GPUs, 31 terabytes of HBM4 memory, and 2.9 exaflops of FP4 inference compute. It is AMD’s first rack-scale AI system and...

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phoronix.com /2 days ago

Mysterious x86 CPU Already Has APX, x86S Where Intel Left Off For Legacy-Free x86

The mystery deepens around an x86 implementation from a corporate entity other than AMD and Intel and has been making some very intriguing changes for coming from a seeming start-u...

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phoronix.com /1 day ago

LLVM Merges Support For AMD's RMPCHKD, RMPREAD & RMPOPT Instructions

With the Linux kernel still working toward landing support for AMD's RMPOPT optimization for helping to reduce overhead on SEV-SNP enabled servers, the LLVM/Clang compiler has in t...

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3dnews.ru /1 month ago

AMD снабдит Anthropic стойками Helios с ускорителями Instinct MI455X общей мощностью 2 ГВт

Сегодня AMD и Anthropic объявили о совместных планах по развёртыванию до 2 ГВт графических процессоров AMD Instinct MI450 в стоечных решениях AMD Helios, начиная с первой половины...

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phoronix.com /1 month ago

AMD Publishes CDNA5 ISA Documentation For Instinct MI455X

Following last week's launch of the AMD Instinct MI455X, AMD has now kept with tradition and provided ISA documentation concerning this latest CDNA5 architecture...

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williamlam.com /1 day ago

VCF 9.1.1 - Reducing CPU Utilization on AMD Ryzen Zen4/Zen5 by Masking the RDSEED Instruction

While I am a huge fan of the recent AMD Ryzen Zen4/Zen5-based consumer platforms, including the versatile Minisforum MS-A2, it

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habr.com /1 month ago

Бенчмаркая Sum: ускорил циклом — замедлил в ×4,7

Уважаемые читатели, в этой статье я хочу рассказать о том, что происходит внутри values.Sum() в современном .NET — там нашлись векторные инструкции, контроль переполнения и список...

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phoronix.com /4 weeks ago

Intel AMX Performance With The Xeon 678X Workstation CPU

One of the most compelling features for Intel Xeon 6 Granite Rapids alongside MRDIMMs is Advanced Matrix Extensions (AMX) for helping accelerate AI workloads and more. AMX is also...

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phoronix.com /3 weeks ago

Tenstrorrent Posts GCC Compiler Patches For Ascalon XG Core

While the Tenstorrent Ascalon X is known as their high performance out-of-order RISC-V RVA23 CPU core for extreme performance over the H and S models, a new GNU Compiler Collection...

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habr.com /1 month ago

Разбор AMD EPYC Venice: 256 ядер, 2-нм TSMC, два сокета и СЖО как неизбежность

Всем привет, с вами Сергей Ковалёв, менеджер выделенных серверов в Selectel. Как инфраструктурный провайдер, мы ежедневно предоставляем клиентам серверы на процессорах AMD и Intel...

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phoronix.com /4 weeks ago

Intel ANV Driver Enables Vulkan Video AV1 Encoding For DG2/Alchemist GPUs

Hyunjun Ko of Igalia continues working on Vulkan Video support for Intel graphics hardware on Linux with the ANV driver. Merged now for Mesa 26.3-devel is enabling AV1 video encodi...

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