Latest updates for Risc-V

Fresh curated links around RISC-V are collected here so marketers can spot useful updates and turn timely ideas into posts faster.

Recent items include:

  • RISC-V profiles – why is RVA23 significant?
  • How to use RISC-V custom instructions with Ubuntu
  • SpacemiT shows off usably quick RISC-V mini desktop

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Fresh articles and ideas

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ubuntu.com /1 month ago

RISC-V profiles – why is RVA23 significant?

Introduction One of the important offerings of the RISC-V Instruction Set Architecture (ISA) is the ability to customize and extend the base instruction set. An initial reaction to...

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ubuntu.com /3 weeks ago

How to use RISC-V custom instructions with Ubuntu

Introduction My previous blog talked about the importance of instruction set standardization for ecosystem stability and growth through the use of profiles. And standardization is...

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theregister.com /1 month ago

SpacemiT shows off usably quick RISC-V mini desktop

Actual RVA23 hardware and useful performance – for a certain price

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phoronix.com /1 week ago

RISC-V RVV Vector Performance Benchmarks With The SpacemiT K3 SoC

Since May we have been benchmarking the SpacemiT K3 RISC-V SoC as one of the first to market RISC-V chips supporting the RVA23 profile. The SpacemiT K3 has shown how far RISC-V per...

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phoronix.com /1 month ago

Initial Benchmarks Of The SpacemiT K3 RVA23 RISC-V CPU With The K3 Pico-ITX

One of the RISC-V SoCs we have been most looking forward to this year is the SpacemiT K3 that features the X100 RISC-V cores that are RVA23 compliant and among the first readily av...

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phoronix.com /1 month ago

RISC-V CPU Performance Up 8x In Five Years: SiFive HiFive Unmatched To SpacemiT K3

Recently I published some initial SpacemiT K3 benchmarks for that first-to-market RISC-V RVA23 SoC with the K3 Pico-ITX mini computer. In there was a comparison against modern Inte...

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xiaomitoday.com /2 weeks ago

StarFive and LECARC to Develop RISC-V Server CPUs for Intelligent Edge Computing

StarFive has announced a new partnership with server CPU design company LECARC to develop a new generation of RISC-V server processors designed for intelligent edge computing. The...

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theregister.com /2 weeks ago

One man, two kernels, and a lot of RISC-V

A homebrew PC and mini-mainframe were only the warm-up for Yuri Zaporozhets' latest operating system

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theregister.com /1 month ago

Alibaba gets Android 16 running on RISC-V

Beijing’s sovereign stack ambitions strengthen

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theregister.com /1 day ago

RISC-V firmware project wants every board booting from the same hymn sheet

HFI proposes a familiar PC-style route from power-on to operating system

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phoronix.com /3 weeks ago

Linux 7.2 RISC-V Reduces Kernel Startup Overhead, Eswin SoC Support By Default

Along with the many x86/x86_64 improvements and some ARM64 architecture improvements (albeit slowed down by the AI/LLM noise affecting the development pace), the RISC-V architectur...

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dev.to /1 month ago

Vortex 3.0 RISC-V GPGPU, Pragtical SDL GPU Backend, NVIDIA RTX Spark Launch

Vortex 3.0 RISC-V GPGPU, Pragtical SDL GPU Backend, NVIDIA RTX Spark Launch Today's Highlights Today's top stories highlight significant advancements in open-source GP...

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phoronix.com /1 month ago

Linux 7.2 To Enable ESWIN SoC Support By Default For RISC-V Kernel Builds

An important one-liner is set to come for Linux 7.2 to enable ESWIN SoC support by default for RISC-V kernel builds. This change will allow default RISC-V kernel builds in turn to...

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cnx-software.com /4 weeks ago

Zhihe A210 octa-core RISC-V SoC with 12 TOPS NPU powers SoM-based development board

Last year, we noted three upcoming high-performance RISC-V SoCs to watch out for: Zhihe A210, SpacemiT K3, and UltraRISC UR-DP1000. The K3 has already been launched, and I’ll work...

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indiandefensenews.in /2 weeks ago

Aheesa Tapes Out India’s First RISC-V Broadband Network SoC In Early 2026

Aheesa Digital Innovations has achieved a significant milestone in India’s semiconductor journey with the tape-out of VIHAAN-I, the country’s first domestically designed RISC-V-bas...

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theregister.com /1 week ago

Madlad builds homebrew GPU using 8,192 RISC-V chips

The next version will have 32,000 MCUs

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phoronix.com /3 days ago

Linux 7.2 Enabling UltraRISC RISC-V Support In The Default Kernel Build

Similar to Linux 7.2 enabling Eswin SoC support by default in the RISC-V "defconfig" kernel build, UltraRISC RISC-V coverage is also now being enabled by default for RISC-V kernel...

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phoronix.com /1 month ago

Vortex 3.0 Released As Full-Stack, Open-Source RISC-V GPU Now With 3D Pipeline

The open-source developers at Georgia Tech working on Vortex as an OpenCL-compatible RISC-V GPGPU implementation are out with their next major release for this open-source GPU desi...

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phoronix.com /4 days ago

HFI BIOS Aims To Provide A POST-Like Power On Screen & BIOS Setup Utility For RISC-V

The Harmonic Firmware Initiative "HFI" is trying to provide a generic, standardized power-on firmware experience for RISC-V boards. Akin to the x86 world with having immediate grap...

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cnx-software.com /1 month ago

Fortior FU75xx dual-core motor control MCU family combines 32-bit RISC-V core with 2nd-gen Motor Engine (ME2) core

Motor driver IC specialist Fortior Technology has recently introduced the FU75xx dual-core motor control MCU family, pairing a 32-bit RISC-V core and the company’s proprietary 2nd-...

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phoronix.com /2 weeks ago

GCC 17 Compiler Lands SpacemiT X100 Core Targeting

The newest GCC 17 compiler code has landed support for -mcpu=spacemit-x100 and -mtune=spacemit-x100 targeting for the SpacemiT X100 RISC-V core...

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phoronix.com /1 week ago

Linux 7.2-rc2 Raising The Default RISC-V 64-bit CPU Limit To 256 Cores

A post merge-window change that landed in Linux Git overnight ahead of tomorrow's Linux 7.2-rc2 release is bumping the default limit on the number of supported CPU cores for RISC-V...

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phoronix.com /3 weeks ago

QSOE v0.1 Released As A QNX-Inspired RISC-V OS

QSOE 0.1 has made its debut as a QNX-inspired, dual kernel architecture open-source operating system just targeting RISC-V...

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3dnews.ru /1 month ago

Alibaba заявила, что смогла запустить Android 16 на процессорах RISC-V

Входящее в Alibaba научно-исследовательское подразделение DAMO Academy запустило Google Android 16 на процессорах XuanTie 9-й серии — эти чипы построены на открытой архитектуре RIS...

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Sources covering Risc-V

phoronix.com

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3dnews.ru

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dev.to

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insights.ubuntu.com

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cnx-software.com

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indiandefensenews.in

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