Evolution of the RISC-V ISA. What next after RVA23?
Introduction Releasing the RVA23 specification was a major milestone for the RISC-V community. While it provides an excellent baseline for deployment at scale, innovation continues...
Search fresh public links, source activity, and ready-to-use post angles for Risc-V.
Fresh curated links around RISC-V are collected here so marketers can spot useful updates and turn timely ideas into posts faster.
Recent items include:
Recent curated links from global sources. Generate one free draft from any story, then use SocialBu to schedule and refine your content calendar.
Introduction Releasing the RVA23 specification was a major milestone for the RISC-V community. While it provides an excellent baseline for deployment at scale, innovation continues...
The 64-bit RISC-V cores come in 1-, 2-, and 4-core options, use less power, and support Linux, Zephyr, and FreeRTOS. Micro Magic has made its MagicV 64-bit RISC-V processor cores a...
Shanghai-based UltraRISC Technology showed UR-CP400, an RVA23-compliant RISC-V processor core IP with 8-wide out-of-order issue. It quotes SPECint2006 above 22/GHz on an FPGA proto...
Efinix has introduced the Sapphire RV64 SoC, a configurable 64-bit RISC-V soft-core processor designed for its Titanium and Trion FPGAs. It is based on the VexiiRiscv core and can...
Efinix expands its Sapphire RISC-V SoC family with a configurable 64-bit processor offering larger memory support, Linux capability and FPGA acceleration for embedded and edge AI d...
Alibaba's DAMO Academy says XuanTie E908A is the first RISC-V CPU IP to meet both ASIL-B and ASIL-D, with SPFM above 90%. It also shared an automotive and embodied AI roadmap led b...
The RISC-V RVA23 profile is a big deal for reducing fragmentation in the RISC-V ecosystem and standardizing more of the ISA to make it easier to distribute modern RISC-V binaries a...
Three teams have won the Digital India RISC-V Grand Challenge using SHAKTI and VEGA processor platforms, while the challenge’s SHAKTI hardware and software remain available for dev...
The Linux kernel build for RISC-V doesn't currently make use of the CPU ISA's Vector extension. but leveraging it with compiler auto vectorization is showing the ability to provide...
Following the interesting SpacemiT K3 RVA23 RISC-V SoC, SpacemiT today announced the V100 server-class RISC-V processor...
As a follow up to last month's article about patches being posted for enabling "-mcpu=native -mtune=native" support for RISC-V with the GCC compiler, that code is now merged for wh...
As global adoption of the open-source RISC-V chip architecture accelerates, US intellectual property provider MIPS is collaborating with Chinese firms at an unprecedented level, ac...
A SiFive engineer posted patches today for the GNU Compiler Collection (GCC) for adding -mtune=native -mcpu=native support for the compiler on RISC-V...
Делаем монохромный видеоадаптер для RISC‑V процессора YRV, используем атомики для установки пикселя. Исправляем детскую травму, добавляем цвет, превращаем адаптер в фреймбуфер а‑ля...
Российские компании GS Nanotech и НИИЭТ завершили корпусирование пилотной партии двухъядерного 32-разрядного микроконтроллера К1921ВГ1Т на архитектуре RISC-V. Новая версия получила...
HPMicro has introduced the HPM5100 series, a family of 32-bit RISC-V mixed-signal MCUs, starting with the HPM5151 parts. It features a 400 MHz RISC-V processor, 416 KB SRAM, 1 MB f...
14 ноября — большой день сразу для двух инженерных сообществ. В ННГУ им. Лобачевского в Нижнем Новгороде до обеда будут говорить про RISC-V, а после обеда — про FPGA. Предусмотрен...
Installing the Ubuntu desktop on RISC-V hardware is made easier with 26.10, as Canonical is now building official riscv64 desktop images. Experimental versions of the upcoming Ubun...
For those interested in the SpacemiT K3 as one of the few RVA23 RISC-V SoCs readily available so far and in the likes of the K3 Pico-ITX system, more improvements for its upstream...
Ubuntu Linux ISOs for RISC-V 64-bit to date have just been the server/CLI version without any desktop environment pre-seeded. But with next week's Ubuntu 26.10 release, there will...
Alibaba’s recent announcement about its XuanTie C950 CPU has sparked interest in the AI hardware community. According to The Stack, this RISC-V-based processor reportedly runs the...
Lanxin Computing has launched a supernode built on LX500, a 48-core RISC-V chip with a 75 TOPS INT8 AI engine that puts general computing and inference on one die.
SpacemiT and XiangShan launched V100 with three servers. The G5201 AI server takes eight double-width cards and is validated with Kunlunxin M100; major Linux distros install direct...
YuzukiHD has made another open-source hardware Linux SBC. YuzukiNeko is a Raspberry Pi Pico-sized single board computer powered by a new Allwinner F101 RISC-V SoC. The Allwinner F1...
Use SocialBu to discover ideas, generate post drafts, and schedule them across your social channels.