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habr.com /1 week ago

VIII митап Альянса RISC-V и слет FPGA-Systems YADRO — в одном нижегородском флаконе

14 ноября — большой день сразу для двух инженерных сообществ. В ННГУ им. Лобачевского в Нижнем Новгороде до обеда будут говорить про RISC-V, а после обеда — про FPGA. Предусмотрен...

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runet.news /3 weeks ago

Российский двухъядерный RISC-V-микроконтроллер уменьшили в пять раз

Российские компании GS Nanotech и НИИЭТ завершили корпусирование пилотной партии двухъядерного 32-разрядного микроконтроллера К1921ВГ1Т на архитектуре RISC-V. Новая версия получила...

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pandaily.com /2 days ago

UltraRISC Shows UR-CP400 RISC-V Core IP: RVA23, 8-Wide Out-of-Order, Delivery in Q1 2027

Shanghai-based UltraRISC Technology showed UR-CP400, an RVA23-compliant RISC-V processor core IP with 8-wide out-of-order issue. It quotes SPECint2006 above 22/GHz on an FPGA proto...

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ubuntu.com /1 month ago

Evolution of the RISC-V ISA. What next after RVA23?

Introduction Releasing the RVA23 specification was a major milestone for the RISC-V community. While it provides an excellent baseline for deployment at scale, innovation continues...

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electronicsforu.com /1 month ago

RISC-V Cores for Low-Power Devices

The 64-bit RISC-V cores come in 1-, 2-, and 4-core options, use less power, and support Linux, Zephyr, and FreeRTOS. Micro Magic has made its MagicV 64-bit RISC-V processor cores a...

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habr.com /1 month ago

RISC‑V c ZX‑Spectum like адаптером с 12 битным цветом и атомиками на плате DE0-CV

Делаем монохромный видеоадаптер для RISC‑V процессора YRV, используем атомики для установки пикселя. Исправляем детскую травму, добавляем цвет, превращаем адаптер в фреймбуфер а‑ля...

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scmp.com /2 weeks ago

How US-China RISC-V collaboration is deepening despite chip rivalry

As global adoption of the open-source RISC-V chip architecture accelerates, US intellectual property provider MIPS is collaborating with Chinese firms at an unprecedented level, ac...

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theregister.com /1 month ago

SiFive pushes development server to take RISC-V into the datacenter

Rack-mount system intended for software porting, workload optimization, to bring open standard to the bitbarn

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pandaily.com /2 days ago

DAMO Academy's XuanTie E908A Is an Automotive RISC-V CPU IP Aimed at ASIL-B and ASIL-D Designs

Alibaba's DAMO Academy says XuanTie E908A is the first RISC-V CPU IP to meet both ASIL-B and ASIL-D, with SPFM above 90%. It also shared an automotive and embodied AI roadmap led b...

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allaboutcircuits.com /3 days ago

Efinix Buckles Down on 64-bit RISC-V Performance for Embedded FPGA Designs

Efinix expands its Sapphire RISC-V SoC family with a configurable 64-bit processor offering larger memory support, Linux capability and FPGA acceleration for embedded and edge AI d...

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cnx-software.com /2 weeks ago

Efinix Sapphire RV64 SoC – Configurable RISC-V soft-cores with DDR3, LPDDR4x, and HyperRAM for Efinix FPGAs

Efinix has introduced the Sapphire RV64 SoC, a configurable 64-bit RISC-V soft-core processor designed for its Titanium and Trion FPGAs. It is based on the VexiiRiscv core and can...

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phoronix.com /3 days ago

SpacemiT Announces The V100 Server-Class RISC-V Processor

Following the interesting SpacemiT K3 RVA23 RISC-V SoC, SpacemiT today announced the V100 server-class RISC-V processor...

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phoronix.com /1 week ago

Linux Finally Making It Easier To Answer The Question: "Is This RISC-V System RVA23?"

The RISC-V RVA23 profile is a big deal for reducing fragmentation in the RISC-V ecosystem and standardizing more of the ISA to make it easier to distribute modern RISC-V binaries a...

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electronicsforu.com /1 month ago

Artix-7 Board Runs India’s 64-Bit SHAKTI RISC-V Core

Three teams have won the Digital India RISC-V Grand Challenge using SHAKTI and VEGA processor platforms, while the challenge’s SHAKTI hardware and software remain available for dev...

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pandaily.com /2 days ago

SpacemiT Pairs V100 RISC-V Server CPU With Three Servers, Kunlunxin M100 Validation and Linux

SpacemiT and XiangShan launched V100 with three servers. The G5201 AI server takes eight double-width cards and is validated with Kunlunxin M100; major Linux distros install direct...

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habr.com /3 weeks ago

Когда быстрый чип ждет данные: где России искать место в гонке ИИ‑ускорителей

Когда говорят об аппаратном обеспечении для искусственного интеллекта, разговор обычно быстро сводится к GPU. У кого больше ускорителей, современнее техпроцесс и выше показатели в ...

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3dnews.ru /1 month ago

VMware: RISC-V никому не нужен, а Arm до зрелости ещё несколько лет

В Broadcom считают, что Arm-серверы не будут занимать значительную долю рынка в корпоративном секторе ещё, как минимум, три-пять лет. Об этом заявил Рам Велага (Ram Velaga), с 1 ян...

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cnx-software.com /1 month ago

YuzukiNeko – A Linux-capable Allwinner F101 RISC-V SBC with Raspberry Pi Pico form factor

YuzukiHD has made another open-source hardware Linux SBC. YuzukiNeko is a Raspberry Pi Pico-sized single board computer powered by a new Allwinner F101 RISC-V SoC. The Allwinner F1...

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phoronix.com /1 month ago

GCC 17 Now Supports Using -mtune=native -mcpu=native On RISC-V

As a follow up to last month's article about patches being posted for enabling "-mcpu=native -mtune=native" support for RISC-V with the GCC compiler, that code is now merged for wh...

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phoronix.com /1 month ago

Linux 7.3 Adds Support For Several Newer RISC-V Extensions

With the in-development Linux 7.3 is support for discovering and enumerating support for several newer RISC-V ISA extensions. Plus there are improvements to its control flow integr...

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cnx-software.com /1 week ago

HPMicro HPM5100 RISC-V MCU integrates four 16-bit ADCs, four op-amps for analog sensing and motor control

HPMicro has introduced the HPM5100 series, a family of 32-bit RISC-V mixed-signal MCUs, starting with the HPM5151 parts. It features a 400 MHz RISC-V processor, 416 KB SRAM, 1 MB f...

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phoronix.com /2 weeks ago

SpacemiT RISC-V SoCs To See More Improvements With Linux 7.4

For those interested in the SpacemiT K3 as one of the few RVA23 RISC-V SoCs readily available so far and in the likes of the K3 Pico-ITX system, more improvements for its upstream...

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pandaily.com /1 month ago

Radiant D35 RISC-V Dataflow Chip Partners With PrimeBot for Embodied Edge

Suzhou chip designer Ricore’s Radiant D35 RISC-V dataflow AI chip was named a compute ecosystem partner for PrimeBot, aiming edge inference at humanoid and embodied robots rather t...

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phoronix.com /1 month ago

GCC Patches Added -mcpu=native -mtune=native Support For RISC-V

A SiFive engineer posted patches today for the GNU Compiler Collection (GCC) for adding -mtune=native -mcpu=native support for the compiler on RISC-V...

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