Social Media Ideas for Xilinx

Efinix Titanium Edge FPGA family targets low-power edge AI and vision systems

Efinix has introduced the Titanium Edge FPGA family designed for low-power edge AI and machine vision applications. Based on the company’s Titanium FPGA architecture, the new famil...

Загружаем bitstream из Linux через FPGA Manager на Zynq-7000

Добрый день!В прошлой статье мы подготовили кастомную плату на Zynq-7000 для загрузки Linux: Buildroot, U-Boot SPL, device tree и минимальная rootfs уже работают. Но PL-часть при э...

Efinix Seeks to Overcome Edge AI Constraints With New FPGA Family

The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI I/O, and robust security/reliability features for intelligent...

Synopsys Rolls Out First Complete CXL 4.0 IP for AI Memory Connectivity

The controller, PHY, security, and verification IP support 128 GT/s links and target rack-scale memory pools exceeding 100 TB.

Chiplets Aim to Accelerate AI Design 

Can AI chip development become faster and less complex? A modular chiplet approach aims to simplify custom silicon design.  TYLsemi has introduced a production-ready chiplet portfo...

AMD Versal Premium Gen 2 MoP adaptive SoC integrates 32GB LPDDR5X to shrink board footprint by 60%

AMD has announced the Versal Premium Gen 2 Memory-on-Package (MoP) adaptive SoCs, adding an integrated memory option to the Premium Gen 2 family, a topic we covered back in Novembe...

Lua-programmable ELM11-Feather board puts Gowin GW1NR FPGA into Feather form factor (Crowdfunding)

BrisbaneSilicon ELM11-Feather is a “microcontroller” board based on a Gowin GW1NR FPGA that is natively programmable in Lua, C, SystemVerilog, and VHDL. Compatible with the Adafrui...

Intel 14A Design Ecosystem Gains Support from Major EDA Partners

Siemens, Cadence, Synopsys, and Keysight have certified new design tools, reference flows, IP, and simulation support for Intel 14A.

QuickLogic Targets Defense, Space Growth With Rad-Hard FPGA Push

AMD Unveils Adaptive SoC With 32 GB of Memory-on-Package Embedded DRAM

Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts board space by 60% while gaining 288 GB/s bandwidth and 15-ye...

AI Starts Designing Chips: EDA Giants Synopsys, Cadence, and Siemens EDA Open the Agentic AI War — Chinese Vendors See a...

At DAC 2026, Synopsys, Cadence, and Siemens EDA each unveiled agentic AI strategies for chip design, from Synopsys' L1-L5 autonomy ladder and Cadence's AuraStack super agent to Sie...