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cnx-software.com /1 month ago

AMD launches Versal Prime Gen 2 2VM3454, 2VM3254, and 2VM3104 adaptive SoCs in compact 23x23mm packages

AMD has added three new chips to its Versal Prime Series Gen 2 lineup: the Versal 2VM3454, 2VM3254, and 2VM3104. Designed for space-constrained applications like Pro AV, broadcast,...

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cnx-software.com /1 week ago

AMD Versal Premium Gen 2 MoP adaptive SoC integrates 32GB LPDDR5X to shrink board footprint by 60%

AMD has announced the Versal Premium Gen 2 Memory-on-Package (MoP) adaptive SoCs, adding an integrated memory option to the Premium Gen 2 family, a topic we covered back in Novembe...

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cnx-software.com /1 month ago

Altera Agilex 9 Direct RF-Series AGRW039 SoC FPGA targets high-performance RF systems

Altera’s wideband Agilex 9 Direct RF-Series AGRW039 SoC FPGA is designed for high-performance Radio Frequency (RF) systems in aerospace, defense, and advanced communications system...

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allaboutcircuits.com /2 weeks ago

AMD Unveils Adaptive SoC With 32 GB of Memory-on-Package Embedded DRAM

Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts board space by 60% while gaining 288 GB/s bandwidth and 15-ye...

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3dnews.ru /1 month ago

AMD выпустила адаптивные SoC серии Versal Prime Gen 2

Компания AMD анонсировала новые адаптивные SoC семейства Versal Prime Gen 2: 2VM3454, 2VM3254 и 2VM3104. Они ориентированы на профессиональное аудиовизуальное оборудование, системы...

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allaboutcircuits.com /1 day ago

Efinix Seeks to Overcome Edge AI Constraints With New FPGA Family

The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI I/O, and robust security/reliability features for intelligent...

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allaboutcircuits.com /1 month ago

Microchip Releases Data Center Retimers for High‑Bandwidth Architectures

The new XpressConnect PCIe 6.0 and CXL 3.1 Retimers reign in signal integrity challenges in AI data centers and other high-bandwidth installations.

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cnx-software.com /1 month ago

PZSDR P047 RF-ADC and RF-DAC high-end SDR board is based on AMD Zynq UltraScale+ ZU47DR RFSoC (Crowdfunding)

PZSDR P047 RF-ADC and RF-DAC software-defined radio (SDR) board is based on AMD Zynq UltraScale+ ZU47DR RFSoC with a quad-core Cortex-A53 processor, a dual-core Cortex-R5F real-tim...

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habr.com /2 weeks ago

Загружаем bitstream из Linux через FPGA Manager на Zynq-7000

Добрый день!В прошлой статье мы подготовили кастомную плату на Zynq-7000 для загрузки Linux: Buildroot, U-Boot SPL, device tree и минимальная rootfs уже работают. Но PL-часть при э...

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hardware.slashdot.org /1 month ago

AMD (Xilinx) is Excluding Linux From the Free Tier For Its FPGA Dev Tool

Long-time Slashdot reader Sun writes: AMD has announced a change to the way they are licensing Vivado, their FPGA development tool... Hidden between the lines of the announcement...

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allaboutcircuits.com /1 month ago

PCIe 7.0 Roundup: Test and Timing Tools Emerge as Ecosystem Takes Shape

To support the transition to PCIe 7.0, three companies have introduced new automated testing applications, ultra-low-jitter clock generators, and protocol analysis platforms to bri...

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cnx-software.com /4 weeks ago

Zhihe A210 octa-core RISC-V SoC with 12 TOPS NPU powers SoM-based development board

Last year, we noted three upcoming high-performance RISC-V SoCs to watch out for: Zhihe A210, SpacemiT K3, and UltraRISC UR-DP1000. The K3 has already been launched, and I’ll work...

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cnx-software.com /5 days ago

Lua-programmable ELM11-Feather board puts Gowin GW1NR FPGA into Feather form factor (Crowdfunding)

BrisbaneSilicon ELM11-Feather is a “microcontroller” board based on a Gowin GW1NR FPGA that is natively programmable in Lua, C, SystemVerilog, and VHDL. Compatible with the Adafrui...

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allaboutcircuits.com /2 weeks ago

Exclusive—Synopsys Debuts ESUN IP for Breaking AI ‘Slowest Packet’ Bottleneck

Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable seamless, scalable performance for modern AI infrastructure.

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cnx-software.com /4 weeks ago

ADLINK COM-HPC-mPTL COM-HPC Mini computer-on-module features up to 180 TOPS Intel Core Ultra Series 3 CPU

ADLINK COM-HPC-mPTL is a COM-HPC R1.3 Mini computer-on-module powered by the Intel Core Ultra Processor Series 3 “Panther Lake” family, up to the 180 TOPS 16-core Core Ultra X7 358...

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phoronix.com /1 week ago

RISC-V RVV Vector Performance Benchmarks With The SpacemiT K3 SoC

Since May we have been benchmarking the SpacemiT K3 RISC-V SoC as one of the first to market RISC-V chips supporting the RVA23 profile. The SpacemiT K3 has shown how far RISC-V per...

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theregister.com /1 month ago

Broadcom's custom ASIC biz adds South Korea's FuriosaAI to its empire

Third-gen chips to use Broadzilla's advanced packaging, networking tech

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electronicsforu.com /1 month ago

Autonomous AI ‘Virtual Engineer’ for Chip Design

New agentic EDA capability is positioned to execute design and verification tasks with minimal human intervention, aiming to compress simulation-heavy workflows and speed time-to-s...

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cnx-software.com /1 month ago

Firefly CSC2-N48SPK3 – A 2880 TOPS RISC-V AI server with 48 SpacemiT K3 Nodes, 48 NVMe SSDs

After SpacemiT officially launched the K3 Pico-ITX SBC, and the K3 chip entered volume production, an Edge AI mini PC, and a laptop motherboard (for Framework 13) have been release...

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theregister.com /1 month ago

Delos Data offers AI chip startups a fast track to rack scale

Half the trouble of building an Nvidia NVL or AMD Helios competitor is just getting the networking out of the box

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electronicsforu.com /1 month ago

Prototype Software Improves 3D Chip Optimization

A chip design tool treats multilayer chips as one 3D structure, reducing wire length by 30% while improving performance and thermal management. Peking University’s School of Integr...

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allaboutcircuits.com /1 month ago

Siemens Intros AI-Powered Library Characterizer to Speed IC Design

New characterization software delivers 7x throughput gains by combining a predictive AI engine with a purpose-built SPICE simulator.

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fiercesensors.com /4 weeks ago

The quest for better chip design accelerates

Synopsys announces Multiphysics Fusion products and early customers to lower prevent respins and lower costs

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allaboutcircuits.com /2 weeks ago

Exclusive CEO Interview: Rebellions’ NPU Leverages Memory-Centric Chiplets

The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language models at lower cost per token.

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