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cnx-software.com /3 weeks ago

AMD Versal Prime VM2152 mid-range adaptive SoC features 112 Gbps GTM Transceivers, 600Gbps Ethernet, DDR5/LPDDR5

The AMD Versal Prime VM2152 adaptive SoC is designed as a mid-range device for high-speed connectivity, with 112 Gbps transceivers and 600 GbE networking in a power-efficient packa...

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cnx-software.com /2 days ago

AMD launches Versal Prime Gen 2 2VM3454, 2VM3254, and 2VM3104 adaptive SoCs in compact 23x23mm packages

AMD has added three new chips to its Versal Prime Series Gen 2 lineup: the Versal 2VM3454, 2VM3254, and 2VM3104. Designed for space-constrained applications like Pro AV, broadcast,...

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allaboutcircuits.com /2 weeks ago

Altera Intros Upgrade of FPGA AI Suite Enabling Determinism for Physical AI

The new version of FPGA AI Suite is designed to accelerate trained AI models into FPGAs

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electronicsforu.com /3 weeks ago

Dual Switches for High-Bandwidth Signal Routing

Dual high-speed switches route PCIe 6.0 and USB4 v2.0 signals, delivering up to 34 GHz bandwidth while enduring extreme industrial temperatures. Toshiba has introduced the TDS5C212...

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3dnews.ru /3 weeks ago

AMD представила адаптивную SoC Versal Prime VM2152 с поддержкой DDR5 и PCIe 5.0

Компания AMD анонсировала адаптивную «систему на кристалле» (SoC) Versal Prime VM2152, предназначенную для использования в оборудовании для дата-центров, сетей связи, 5G-инфраструк...

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allaboutcircuits.com /2 weeks ago

Rambus Introduces PCIe 7.0 Switch With Time-Division Multiplexing

The new switch IP targets AI and data center SoCs that need to move data efficiently across CPUs, GPUs, accelerators, and NVMe storage without adding more physical lanes.

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hardware.slashdot.org /1 week ago

AMD (Xilinx) is Excluding Linux From the Free Tier For Its FPGA Dev Tool

Long-time Slashdot reader Sun writes: AMD has announced a change to the way they are licensing Vivado, their FPGA development tool... Hidden between the lines of the announcement...

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allaboutcircuits.com /1 week ago

PCIe 7.0 Roundup: Test and Timing Tools Emerge as Ecosystem Takes Shape

To support the transition to PCIe 7.0, three companies have introduced new automated testing applications, ultra-low-jitter clock generators, and protocol analysis platforms to bri...

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3dnews.ru /1 month ago

Altera продлила жизненный цикл FPGA до 2045 года

Компания Altera объявила об увеличении жизненного цикла своих FPGA-продуктов: некоторые решения серий Agilex, MAX 10 и Cyclone V будут предлагаться вплоть до 2045 года. Таким образ...

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electronicsforu.com /3 weeks ago

32Gbps ReDriver Targets Smart Cockpits

New four-channel automotive ReDriver improves 32Gbps signal integrity for AI-driven cockpit platforms, supporting PCIe 5.0, SAS4, and CXL while reducing jitter, power consumption,...

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allaboutcircuits.com /1 month ago

SoC Evaluation Boards Evolve to Meet New Design Complexities

Modern SoC Evaluation Boards demand high-performance design, SI/PI, and system validation. Faraday offers 3 flexible service levels to meet these complexities.

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montrealgazette.com /3 weeks ago

Toshiba Releases 2:1 Multiplexer / 1:2 Demultiplexer Switches Supporting High-Speed Differential Signals such as PCIe® 6...

— Suitable for Industrial applications with operating temperatures up to 125°C — KAWASAKI, Japan — Toshiba Electronic Devices & Storage Corporation (“Toshiba”) has launched “ T...

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electronicsforu.com /1 month ago

Plug-In Timing Module For AI Infrastructure Synchronization

What keeps AI infrastructure in sync behind the scenes? A plug in timing module can bring multiple clock sources together without redesigning server architectures. Microchip Techno...

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cnx-software.com /2 weeks ago

RVA23-compliant K3 Pico-ITX SBC and K3-CoM260 SoM feature SpacemiT K3 octa-core RISC-V AI SoC, up to 32GB RAM, 256GB UFS

SpacemiT has now officially launched the K3 Pico-ITX SBC and K3-CoM260 system-on-module with the RVA23-compliant, SpacemiT K3 octa-core X100 CPU with up to 60 TOPS of AI performanc...

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theregister.com /3 days ago

Broadcom's custom ASIC biz adds South Korea's FuriosaAI to its empire

Third-gen chips to use Broadzilla's advanced packaging, networking tech

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pandaily.com /1 month ago

Niuxin Semiconductor Expands PCIe IP Portfolio Across Multiple Generations

Niuxin Semiconductor has built a full PCIe IP portfolio from 3.0 to 5.0, supporting applications in AI computing and data centers, with PCIe 6.0 already developed and moving toward...

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cnx-software.com /1 week ago

Firefly CSC2-N48SPK3 – A 2880 TOPS RISC-V AI server with 48 SpacemiT K3 Nodes, 48 NVMe SSDs

After SpacemiT officially launched the K3 Pico-ITX SBC, and the K3 chip entered volume production, an Edge AI mini PC, and a laptop motherboard (for Framework 13) have been release...

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electronicsforu.com /1 month ago

When Programmable Logic Moves Inside MCUs

What if timing critical logic no longer needed separate hardware? A shift inside microcontrollers is redefining latency, determinism and system level design trade-offs. Microchip...

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cnx-software.com /1 month ago

Microchip PIC16F132 and PIC18-Q35 low-power 8-bit MCUs feature CPLD-like Configurable Logic Blocks (CLB)

Microchip Technology has introduced the PIC16F132 and PIC18-Q35 8-bit families of MCUs, as an upgrade over the PIC16F13145, which combine traditional embedded control with integrat...

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allaboutcircuits.com /3 weeks ago

Arm Axion Heads Google&#8217;s 8th-Gen TPUs as Cloud Pivots to Agentic AI

Google Cloud split the TPU line into training and inference variants, with Arm Neoverse-based Axion CPUs as the host across the stack. Arm also rolled out Performix, a free perform...

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allaboutcircuits.com /3 weeks ago

Microchip Unveils Plug-In Timing Module for AI-Burdened Data Centers

The new plug-in module is designed to meet the timing and synchronization requirements of distributed computing, AI data centers, and upcoming 5G networks.

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allaboutcircuits.com /1 month ago

Nvidia Unveils Seven Chips to &#8216;Scale the World&#8217;s Largest AI Factories&#8217;

The Vera Rubin platform offers a modular, rack-scale architecture to help develop and deploy agentic AI.

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electronicsforu.com /1 month ago

Tools to build high-density chip systems

The process design kits open early access to high-density chip connections, giving you a way to test, build, and push multi-chip systems toward real use cases. The NanoIC pilot lin...

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allaboutcircuits.com /1 month ago

Protocol, Link, &amp; Physical: Synopsys Debuts First &#8216;Complete&#8217; Storage

The flash storage solution is the first complete IP set to include UFS 5.0, UniPro 3.0, and M PHY v6.0—and it delivers double the speed of UFS 4.0.

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