Chip Helps Test Quantum Hardware Before Building The Processors
What if quantum processors could be tested before they are fully built? An indigenous resonator chip is helping validate the hardware path. Srsti Quantum has developed NAADA, a sup...
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What if quantum processors could be tested before they are fully built? An indigenous resonator chip is helping validate the hardware path. Srsti Quantum has developed NAADA, a sup...
Silicon DreamsSEMICON India 2026 and the Making of a Chip PowerhousePosted On: 15 SEP 2026 10:52AM by PIB DelhiOn September 17, Prime Minister Narendra Modi will walk into Yashobh...
In a milestone shift for semiconductor engineering, Cognichip, the frontier lab building Artificial Chip Intelligence ACIâ„¢, today announced the availability of ACI Enterprise, t...
At AICC2026, Inspur Information launched the MetaBrain SD200 Ultra supernode with 128 tightly coupled domestic AI chips, 8 TB of unified accelerator memory and a claimed sub-5.85 m...
Suzhou chip designer Ricore’s Radiant D35 RISC-V dataflow AI chip was named a compute ecosystem partner for PrimeBot, aiming edge inference at humanoid and embodied robots rather t...
Five frontier models now sit within five points of each other in terms of intelligence, but their cost per unit differs by 3.8x. Google, which has built chips alongside its models...
Building a chip should not require assembling an entire design ecosystem. A Noida-based startup is developing a browser-based EDA platform that aims to reduce dependence on expensi...
Wins Two "Best of IFA 2026" Innovation Awards
India’s semiconductor manufacturing drive has reached a new milestone with two additional plants commencing commercial production — the CDIL Semiconductor ATMP Facility and the Suc...
At its 2026 Global Innovation Conference, Chery showed three Ziwei chip lines: a C100 central computing chip, an S1500 1,500V silicon carbide power chip on 8-inch wafers, and M-ser...
- - • Intel collaborated with Arizona State University (ASU) to equip its football program with Lenovo ThinkPad X9 Aura Edition PCs powered by Intel vPro®. - - • Intel engi...
Kepler Computing claims a new approach to chip design—and a proprietary material—can help end the supply bottlenecks that have sent memory prices surging.
Three teams have won the Digital India RISC-V Grand Challenge using SHAKTI and VEGA processor platforms, while the challenge’s SHAKTI hardware and software remain available for dev...
You probably haven’t thought about your chipset lately—but if you were missing it, you would notice. Dado Banatao, who was born in 1946 in a Filipino farming village that lacked el...
A security chip presented to Prime Minister Narendra Modi; the chip showcased by NIT-R, ASCON AEAD Security Chip (C2S0091), has been designed by Mohanty under the supervision of Pr...
How are high-tech chips developed? At a Leibniz Institute, the chancellor saw for himself what top-level researchers are doing in the field of microelectronics.
Four domestic chip platforms said they supported Step 5 Preview on its open-weights release day, and Huawei said its first 1,024-card Atlas 950 SuperPoD went live alongside it.
XFEON launched a physical-AI matrix led by Xinghe S1 (~105 TOPS INT8 / ~25W), the AGLobe embodied brain and Xinghui Token workstations, per September 22 coverage citing xfeon.com.
TATA Electronics has entered a crucial new phase at its semiconductor packaging facility in Jagiroad, Assam, with pilot chip production now under way as the company prepares for fu...
A Jiangsu chip startup founded by former Nvidia GPU architect Xu Feixiang is building Y10, a physical AI processor aiming for sub-millisecond closed-loop latency, with an FPGA plat...
Cambricon completed same-day DeepSeek-V4.1-Flash enablement on vLLM, pairing Torch-MLU-Ops and BangC kernels with NeuWare. The story is chip-side Day-0 co-availability, not another...
A new chip design could bring energy-efficient AI computing to phones and laptops by processing models locally, reducing data movement, latency, and power demands overall. TU/e res...
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