Microchip Clock Buffers Bridge SoCs & FPGAs With Higher-Voltage Sources
The SY757xx family translates clock inputs from 1.2 to 3.3 V down to 1.2 V LVCMOS outputs at frequencies up to 250 MHz,
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The SY757xx family translates clock inputs from 1.2 to 3.3 V down to 1.2 V LVCMOS outputs at frequencies up to 250 MHz,
National Semiconductor packed four single-supply comparators into one cheap package and created one of the most widely used analog ICs ever made.
This week, at the OCP Summit, Texas Instruments unveiled three new ICs designed to prevent power glitches, streamline high-voltage distribution, and minimize signal jitter in AI da...
RackCommander groups MaxLinear's USB UARTs, RS-485 transceivers, GPIO expanders, and power devices for rack-level management.
This 4th-generation IC family minimizes no-load consumption and simplifies safety compliance for consumer and industrial AC-DC power supplies without increasing design complexity.
A new clock-buffer family helps bridge low-voltage processors and higher-voltage components while improving signal integrity and simplifying board design for advanced systems and h...
Companies across industries are leveraging tech from NXP, MaxLinear and Nordic Semiconductor on automotive UWB, accelerated OpenZFS storage, and low-power Bluetooth Mesh sensing.
A regulator supplies power to processors, reduces voltage drops, and supports current delivery in a compact package for AI systems. Ferric has introduced the Fe1767 Newport, a 145...
A high-speed converter captures brief power-rail disturbances in AI data centres, enabling continuous remote monitoring, faster fault diagnosis, improved power reliability and redu...
An online platform helps students learn chip design through practice in Verilog, testing, circuit design, synthesis, and chip layout. BitForBytes has launched a browser-based learn...
Launched today, Delos Data’s Nonstop AI portfolio intros Apollo Data Interface silicon, the Morpheus development platform, and a system-level reference architecture to eliminate ta...
Announced today at OCP Summit, Cisco and Nvidia have partnered on the open USFP optical spec, alongside new Cisco Silicon One ASICs and runtime security to scale next-generation Et...
National Semiconductor reduced the analog bar-graph display to a single IC, a handful of LEDs, and one resistor. The level meter was never the same.
Learn how rising security threats, quantum computing, and strict regulations demand FPGA architectures with integral hardware security and crypto agility for long-term compliance.
Explore MOSFET tradeoffs in high-frequency DC-DC converters through 65 W HFQR and 204 W quarter-brick designs with experts from iDEAL Semiconductor.
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