Hardware Stack IP Core for ASIC and FPGA Designs
A hardware TCP/IP stack enables ASIC and FPGA designs to handle 100 Gbps networking without a host processor. CAST has introduced the TCPIP-100G Hardware Stack IP core, a hardware-...
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A hardware TCP/IP stack enables ASIC and FPGA designs to handle 100 Gbps networking without a host processor. CAST has introduced the TCPIP-100G Hardware Stack IP core, a hardware-...
As chipmakers stack dies vertically to meet surging AI demand, 2D imaging is losing its edge. Automated 3D reconstruction is becoming essential to keeping fabs on pace.
Building a chip should not require assembling an entire design ecosystem. A Noida-based startup is developing a browser-based EDA platform that aims to reduce dependence on expensi...
TATA Electronics has entered a crucial new phase at its semiconductor packaging facility in Jagiroad, Assam, with pilot chip production now under way as the company prepares for fu...
Can stacked chips hide defects that conventional inspection misses? Inspection and wafer correction systems target two manufacturing challenges affecting advanced semiconductor pac...
What if quantum processors could be tested before they are fully built? An indigenous resonator chip is helping validate the hardware path. Srsti Quantum has developed NAADA, a sup...
Katie Stockton breaks down the charts on Arm Holdings.
The current pace of AI development would not be possible without these semiconductor companies.
ISM CEO Amitesh Kumar Sinha explains how a semiconductor chip is made, from sand and design to test and packaging, and why fabs cost billions.
Tata Electronics signs Nexperia chip deal plus four partnerships spanning materials, packaging, indigenization and talent in India.
In 1884, an English schoolmaster wrote a short novel about a world with only length and breadth, whose inhabitants could not conceive of a third direction until one of them was lif...
Researchers developed stacked semiconductor devices with tunable ionic memory, enabling wearable systems to process motion signals locally while achieving over 90% classification a...
VanEck expert Nick Frasse explained on Full Signal why he’s still bullish on semiconductors.
India’s semiconductor manufacturing drive has reached a new milestone with two additional plants commencing commercial production — the CDIL Semiconductor ATMP Facility and the Suc...
Chip stocks slid after Broadcom’s CEO likened AI investing to a casino and China’s CXMT flagged new memory tech. CXMT has not shared specs.
Every chip starts as a design file that passes every rule check. Clean geometry, correct spacing, nothing flagged. And yet, some of those…Continue reading on Medium В»
Five frontier models now sit within five points of each other in terms of intelligence, but their cost per unit differs by 3.8x. Google, which has built chips alongside its models...
KSIA-cited gaps put China about 3 years behind Korea on HBM, 2 on DRAM, 1 on NAND; CXMT LPDDR6 is in volume while HBM trial yield ~25%, with a YMTC XStacking Cu–Cu hybrid-bond DRAM...
At its 2026 Global Innovation Conference, Chery showed three Ziwei chip lines: a C100 central computing chip, an S1500 1,500V silicon carbide power chip on 8-inch wafers, and M-ser...
The Philadelphia Semiconductor Index snapped an eight-session losing streak and its longest string of declines since October 2008.
Silicon DreamsSEMICON India 2026 and the Making of a Chip PowerhousePosted On: 15 SEP 2026 10:52AM by PIB DelhiOn September 17, Prime Minister Narendra Modi will walk into Yashobh...
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