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Three teams have won the Digital India RISC-V Grand Challenge using SHAKTI and VEGA processor platforms, while the challenge’s SHAKTI hardware and software remain available for dev...
Efinix expands its Sapphire RISC-V SoC family with a configurable 64-bit processor offering larger memory support, Linux capability and FPGA acceleration for embedded and edge AI d...
FPGAに代表されるプログラマブルロジックICの歴史をたどる本連載。第15回は、第14回に引き続き2000年代後半のAlteraについて紹介する。新たにミドルレンジ製品の「Arria」が加わり、「Stratix」...
The SY757xx family translates clock inputs from 1.2 to 3.3 V down to 1.2 V LVCMOS outputs at frequencies up to 250 MHz,
Efinix has introduced the Sapphire RV64 SoC, a configurable 64-bit RISC-V soft-core processor designed for its Titanium and Trion FPGAs. It is based on the VexiiRiscv core and can...
Cut complex, power-hungry DDR. A Zephyr-first design on PolarFire SoC FPGAs leverages on-chip scratchpad and low-power alternatives to boost efficiency and lower BoM costs.
The new PolarFire FPGA-powered board from Microchip brings multiple sensors to Nvidia edge AI platforms.
FPGAに代表されるプログラマブルロジックICの歴史をたどる本連載。第14回は、第13回に引き続き2000年代前半のAlteraについて紹介する。同社を代表するFPGA製品「Stratix」と「Cyclone」の投入に...
A new clock-buffer family helps bridge low-voltage processors and higher-voltage components while improving signal integrity and simplifying board design for advanced systems and h...
A modular switching platform lets engineers increase matrix density, simplify servicing, and handle demanding signal-routing and crosstalk measurements. Pickering Interfaces’ 65-21...
Learn how rising security threats, quantum computing, and strict regulations demand FPGA architectures with integral hardware security and crypto agility for long-term compliance.
RackCommander groups MaxLinear's USB UARTs, RS-485 transceivers, GPIO expanders, and power devices for rack-level management.
The X7 runs on 2-5 W, connects over PCIe Gen 3 or USB 3.2, and uses the same CVflow engine already in over 50 million of the company’s AI SoCs.
Circuit Valley’s CHC5 is a modular camera system based on a Core board powered by an AMD/Xilinx Zynq-7020 SoC FPGA, a range of interface boards with USB, HDMI, or Ethernet (PoE), v...
Привет! Меня зовут Кирилл Алексеев, я ведущий инженер в отделе интеграции систем на кристалле радиочастотного центра YADRO. В своей предыдущей статье я рассказывал, чем FPGA-разраб...
A hardware TCP/IP stack enables ASIC and FPGA designs to handle 100 Gbps networking without a host processor. CAST has introduced the TCPIP-100G Hardware Stack IP core, a hardware-...
Select Versal RF Series devices will be AMD's first adaptive SoCs with native UCIe 1.1 interfaces, allowing designers to co-package third-party chiplets.
Tektronix has launched the 7 Series DPO (Digital Phosphor Oscilloscope), and the company claims the DPO718AX model is the world’s first 8-channel performance oscilloscope with up t...
The new carrier board combines three QMC sites, PCIe connectivity, rear I/O, and rugged cooling to simplify modular defence and aerospace system integration across next-generation...
How can engineers debug next-generation chip connections running at 128 GT/s? A test platform aims to expose protocol issues before they delay AI infrastructure development. Keysig...
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