AI Agents Automate Chip Design Tasks
AI agents automate chip design, verification, and system development tasks to reduce engineering work, improve designs, and shorten development time. Synopsys has introduced AgentE...
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AI agents automate chip design, verification, and system development tasks to reduce engineering work, improve designs, and shorten development time. Synopsys has introduced AgentE...
As edge AI chips surpass 900MHz, legacy hardware methods guarantee system failure. For designers, it’s adapt or go obsolete. With the hype around artificial intelligence (AI) reach...
A new chip design could bring energy-efficient AI computing to phones and laptops by processing models locally, reducing data movement, latency, and power demands overall. TU/e res...
Artificial intelligence agents are increasingly taking the wheel in designing China’s next-generation semiconductors, as Beijing and domestic technology firms accelerate efforts to...
Can smartphone processors make AI more proactive without increasing power demands? A 2nm platform combines on-device intelligence with gains in computing, gaming, and imaging. Medi...
Announced today, the company's new CSS for Mobile 2 platform, Total Design for Physical AI program, and Neoverse CSS N4 platform provide specialized architectures for agentic AI wo...
At CIIF 2026, Axera launched the 6nm AX8860 for on-site large-model inference, with AXLink cascading, PCIe 5.0 and a vLLM/SGLang-friendly toolchain.
In a milestone shift for semiconductor engineering, Cognichip, the frontier lab building Artificial Chip Intelligence ACIâ„¢, today announced the availability of ACI Enterprise, t...
What happens when AI inference has to run continuously inside enterprise servers? An accelerator architecture targets higher inference efficiency without replacing existing infrast...
Architect Labs announced today that its AI system generated and fully verified, end-to-end from a human-written specification, a production-worthy AI accelerator called Redwood. W...
AI agents connect with development tools, documents, and workflows to help engineers design, debug, analyse, and deploy embedded systems. AMD has introduced AMD Ross, an agentic ar...
Architect Labs says it used AI to rapidly design its Redwood chip, promising faster development. Researchers say manufacturing is the real test.
The X7 runs on 2-5 W, connects over PCIe Gen 3 or USB 3.2, and uses the same CVflow engine already in over 50 million of the company’s AI SoCs.
New 6nm chips support local AI processing, computer vision, video processing, and low-power operation in cameras and Internet of Things devices. Amlogic has introduced two 6nm syst...
Amid a history lesson on chip advances since 1965, Nvidia and Intel outlined their plans for AI computing.
A processor uses 3D stacking and AI instructions to run inference while reducing power use and the number of servers required. Fujitsu’s FUJITSU-MONAKA processor is designed for AI...
Ross connects developers' preferred LLMs to AMD's Vivado and Vitis HLS toolchains through open-standard MCP servers.
Alibaba's DAMO Academy says XuanTie E908A is the first RISC-V CPU IP to meet both ASIL-B and ASIL-D, with SPFM above 90%. It also shared an automotive and embodied AI roadmap led b...
Chip companies are buying up or consolidating efforts to own the physical AI space, from sensing to decisions and actions.
What happens when AI chips push semiconductor testing beyond conventional limits? These instruments can tackle rising demands for speed, connectivity, and power. Teradyne has laun...
Designing compact AI sensor nodes forces signal integrity and thermal management to compete for limited PCB copper, creating severe PDN and thermal bottlenecks.
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